View 25LC640XT-IP_4472241.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Not recommended for new designs - Please use 25AA640A or 25LC640A.
25AA640/25LC640
64K SPI Bus Serial EEPROM
Device Selection Table
Part Number 25AA640 25LC640 25LC640 VCC Range 1.8-5.5V 2.5-5.5V 4.5-5.5V Max Clock Frequency 1 MHz 2 MHz 3/2.5 MHz Temp Ranges I I I, E
Description:
The Microchip Technology Inc. 25AA640/25LC640 (25XX640*) is a 64 Kbit Serial Electrically Erasable PROM [EEPROM]. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a Chip Select (CS) input. Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts.
Features:
* Low-Power CMOS Technology - Write current: 3 mA, typical - Read current: 500 A, typical - Standby current: 500 nA, typical * 8192 x 8 Bit Organization * 32 Byte Page * Write Cycle Time: 5 ms max. * Self-Timed Erase and Write Cycles * Block Write Protection - Protect none, 1/4, 1/2 or all of array * Built-in Write Protection - Power on/off data protection circuitry - Write enable latch - Write-protect pin * Sequential Read * High Reliability - Data retention: > 200 years - ESD protection: > 4000V * 8-pin PDIP, SOIC and TSSOP Packages * Temperature Ranges Supported: - Industrial (I): -40C to +85C - Automotive (E): -40C to +125C
Block Diagram
STATUS Register HV Generator
EEPROM I/O Control Logic Memory Control Logic XDEC Array
Page Latches
SI SO CS SCK HOLD WP VCC VSS Sense Amp. R/W Control Y Decoder
Package Types
PDIP/SOIC CS SO WP VSS 1 25XX640 2 3 4 8 7 6 5 VCC HOLD SCK SI HOLD VCC CS SO 1 2 3 4 TSSOP 25XX640 8 7 6 5 SCK SI VSS WP
*25XX640 is used in this document as a generic part number for the 25AA640/25LC640 devices.
(c) 2008 Microchip Technology Inc.
DS21223H-page 1
25AA640/25LC640
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings()
VCC.............................................................................................................................................................................7.0V All inputs and outputs w.r.t. VSS ........................................................................................................ -0.6V to VCC + 1.0V Storage temperature .................................................................................................................................-65C to 150C Ambient temperature under bias ...............................................................................................................-65C to 125C ESD protection on all pins ..........................................................................................................................................4 kV NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an extended period of time may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
Industrial (I): TA = -40C to +85C VCC = 1.8V to 5.5V Automotive (E): TA = -40C to +125C VCC = 4.5V to 5.5V Min 2.0 0.7 VCC -0.3 -0.3 -- -- VCC - 0.5 -- -- -- Max VCC + 1 VCC + 1 0.8 0.2 VCC 0.4 0.2 -- 1 1 7 Units V V V V V V V A A pF Conditions VCC 2.7V (Note 1) VCC < 2.7V (Note 1) VCC 2.7V (Note 1) VCC < 2.7V (Note 1) IOL = 2.1 mA IOL = 1.0 mA, VCC = < 2.5V IOH = -400 A CS = VCC, VIN = VSS TO VCC CS = VCC, VOUT = VSS TO VCC TA = 25C, CLK = 1.0 MHz, VCC = 5.0V (Note 1) VCC = 5.5V; FCLK = 3.0 MHz; SO = Open VCC = 2.5V; FCLK = 2.0 MHz; SO = Open VCC = 5.5V VCC = 2.5V CS = VCC = 5.5V, Inputs tied to VCC or VSS CS = VCC = 2.5V, Inputs tied to VCC or VSS
DC CHARACTERISTICS Param. No. D1 D2 D3 D4 D5 D6 D7 D8 D9 Sym VIH1 VIH2 VIL1 VIL2 VOL VOH ILI ILO CINT Characteristics High-level input voltage Low-level input voltage Low-level output voltage High-level output voltage Input leakage current Output leakage current Internal Capacitance (all inputs and outputs)
D10
ICC Read Operating Current
-- --
1 500
mA A
D11 D12
ICC Write ICCS Standby Current
-- -- -- --
5 3 5 1
mA mA A A
Note 1:
This parameter is periodically sampled and not 100% tested.
DS21223H-page 2
(c) 2008 Microchip Technology Inc.
25AA640/25LC640
TABLE 1-2: AC CHARACTERISTICS
Industrial (I): TA = -40C to +85C Automotive (E): TA = -40C to +125C Characteristic Clock Frequency Min -- -- -- 100 250 500 150 250 475 500 30 50 50 50 100 100 -- -- 150 230 475 150 230 475 50 50 -- -- -- 0 -- -- -- 100 100 200 100 100 200 100 150 200 100 150 200 -- 1M Max 3 2 1 -- -- -- -- -- -- -- -- -- -- -- -- -- 2 2 -- -- -- -- -- -- -- -- 150 230 475 -- 200 250 500 -- -- -- -- -- -- -- -- -- -- -- -- 5 -- Units MHz MHz MHz ns ns ns ns ns ns ns ns ns ns ns ns ns s s ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms E/W Cycles (Note 3) VCC = 4.5V to 5.5V VCC = 2.5V to 5.5V VCC = 1.8V to 5.5V (Note 1) VCC = 4.5V to 5.5V (Note 1) VCC = 2.5V to 5.5V (Note 1) VCC = 1.8V to 5.5V (Note 1) VCC = 4.5V to 5.5V VCC = 2.5V to 5.5V VCC = 1.8V to 5.5V VCC = 4.5V to 5.5V VCC = 2.5V to 5.5V VCC = 1.8V to 5.5V VCC = 4.5V to 5.5V (Note 1) VCC = 2.5V to 5.5V (Note 1) VCC = 1.8V to 5.5V (Note 1) VCC = 4.5V to 5.5V VCC = 2.5V to 5.5V VCC = 1.8V to 5.5V VCC = 4.5V to 5.5V VCC = 2.5V to 5.5V VCC = 1.8V to 5.5V VCC = 4.5V to 5.5V VCC = 2.5V to 5.5V VCC = 1.8V to 5.5V (Note 1) (Note 1) VCC = 4.5V to 5.5V VCC = 2.5V to 5.5V VCC = 1.8V to 5.5V VCC = 4.5V to 5.5V VCC = 2.5V to 5.5V VCC = 1.8V to 5.5V VCC = 1.8V to 5.5V VCC = 4.5V to 5.5V Conditions VCC = 4.5V to 5.5V (Note 2) VCC = 2.5V to 5.5V VCC = 1.8V to 5.5V VCC = 4.5V to 5.5V VCC = 2.5V to 5.5V VCC = 1.8V to 5.5V VCC = 4.5V to 5.5V VCC = 2.5V to 5.5V VCC = 1.8V to 5.5V AC CHARACTERISTICS Param. No. 1 Sym FCLK
2
TCSS
CS Setup Time
3
TCSH
CS Hold Time
4 5
TCSD TSU
CS Disable Time Data Setup Time
6
THD
Data Hold Time
7 8 9
TR TF THI
CLK Rise Time CLK Fall Time Clock High Time
10
TLO
Clock Low Time
11 12 13
TCLD TCLE TV
Clock Delay Time Clock Enable Time Output Valid from Clock Low Output Hold Time Output Disable Time
14 15
THO TDIS
16
THS
HOLD Setup Time
17
THH
HOLD Hold Time
18
THZ
HOLD Low to Output High-Z HOLD High to Output Valid Internal Write Cycle Time Endurance
19
THV
20 21
TWC --
Note 1: This parameter is periodically sampled and not 100% tested. 2: FCLK max. = 2.5 MHz for TA > 85C. 3: This parameter is not tested but established by characterization. For endurance estimates in a specific application, please consult the Total EnduranceTM Model which can be obtained from Microchip's web site at: www.microchip.com.
(c) 2008 Microchip Technology Inc.
DS21223H-page 3
25AA640/25LC640
FIGURE 1-1:
CS 16 SCK 18 SO n+2 n+1 n High-Impedance 5 n n-1 19 n n-1 17 16 17
HOLD TIMING
Don't Care SI HOLD n+2 n+1 n
FIGURE 1-2:
SERIAL INPUT TIMING
4 CS 2 Mode 1,1 SCK Mode 0,0 5 SI MSB In 6 LSB In 7 11 8 3 12
SO
High-Impedance
FIGURE 1-3:
SERIAL OUTPUT TIMING
CS 9 SCK 13 14 SO MSB Out 15 LSB Out 10 3 Mode 1,1 Mode 0,0
SI
Don't Care
DS21223H-page 4
(c) 2008 Microchip Technology Inc.
25AA640/25LC640
TABLE 1-3:
AC Waveform: VLO = 0.2V VHI = VCC - 0.2V VHI = 4.0V Input Output Note 1: For VCC 4.0V 2: For VCC > 4.0V (Note 1) (Note 2) 0.5 VCC 0.5 VCC SO 1.8 k 100 pF 2.25 k
AC TEST CONDITIONS
FIGURE 1-4:
AC TEST CIRCUIT
VCC
Timing Measurement Reference Level
(c) 2008 Microchip Technology Inc.
DS21223H-page 5
25AA640/25LC640
2.0 PIN DESCRIPTIONS
PIN FUNCTION TABLE
SOIC 1 2 3 4 5 6 7 8 TSSOP 3 4 5 6 7 8 1 2 Description Chip Select Input Serial Data Output Write-Protect Pin Ground Serial Data Input Serial Clock Input Hold Input Supply Voltage The descriptions of the pins are listed in Table 2-1. The WP pin function is blocked when the WPEN bit in the STATUS register is low. This allows the user to install the 25XX640 in a system with WP pin grounded and still be able to write to the STATUS register. The WP pin functions will be enabled when the WPEN bit is set high.
TABLE 2-1:
Name CS SO WP VSS SI SCK HOLD VCC PDIP 1 2 3 4 5 6 7 8
2.4
Serial Input (SI)
The SI pin is used to transfer data into the device. It receives instructions, addresses, and data. Data is latched on the rising edge of the serial clock.
2.5
Serial Clock (SCK)
The SCK is used to synchronize the communication between a master and the 25XX640. Instructions, addresses, or data present on the SI pin are latched on the rising edge of the clock input, while data on the SO pin is updated after the falling edge of the clock input.
2.1
Chip Select (CS)
2.6
Hold (HOLD)
A low level on this pin selects the device. A high level deselects the device and forces it into Standby mode. However, a programming cycle which is already initiated or in progress will be completed, regardless of the CS input signal. If CS is brought high, or remains high during a program cycle, the device will go into Standby mode when the programming cycle is complete. When the device is deselected, SO goes to the high-impedance state, allowing multiple parts to share the same SPI bus. A low-to-high transition on CS after a valid write sequence initiates an internal write cycle. After power-up, a high-to-low transition on CS is required prior to any sequence being initiated.
2.2
Serial Output (SO)
The SO pin is used to transfer data out of the 25XX640. During a read cycle, data is shifted out on this pin after the falling edge of the serial clock.
The HOLD pin is used to suspend transmission to the 25XX640 while in the middle of a serial sequence without having to retransmit the entire sequence over again. It must be held high any time this function is not being used. Once the device is selected and a serial sequence is underway, the HOLD pin may be pulled low to pause further serial communication without resetting the serial sequence. The HOLD pin must be brought low while SCK is low, otherwise the HOLD function will not be invoked until the next SCK high-tolow transition. The 25XX640 must remain selected during this sequence. The SI, SCK, and SO pins are in a high-impedance state during the time the device is paused and transitions on these pins will be ignored. To resume serial communication, HOLD must be brought high while the SCK pin is low, otherwise serial communication will not resume. Lowering the HOLD line at any time will tri-state the SO line.
2.3
Write-Protect (WP)
This pin is used in conjunction with the WPEN bit in the STATUS register to prohibit writes to the nonvolatile bits in the STATUS register. When WP is low and WPEN is high, writing to the nonvolatile bits in the STATUS register is disabled. All other operations function normally. When WP is high, all functions, including writes to the nonvolatile bits in the STATUS register operate normally. If the WPEN bit is set, WP low during a STATUS register write sequence will disable writing to the STATUS register. If an internal write cycle has already begun, WP going low will have no effect on the write.
DS21223H-page 6
(c) 2008 Microchip Technology Inc.
25AA640/25LC640
3.0
3.1
FUNCTIONAL DESCRIPTION
Principles Of Operation
3.3
Write Sequence
The 25XX640 is a 8192 byte Serial EEPROM designed to interface directly with the Serial Peripheral Interface (SPI) port of many of today's popular microcontroller families, including Microchip's PIC16C6X/7X microcontrollers. It may also interface with microcontrollers that do not have a built-in SPI port by using discrete I/O lines programmed properly with the software. The 25XX640 contains an 8-bit instruction register. The device is accessed via the SI pin, with data being clocked in on the rising edge of SCK. The CS pin must be low and the HOLD pin must be high for the entire operation. Table 3-1 contains a list of the possible instruction bytes and format for device operation. All instructions, addresses, and data are transferred MSB first, LSB last. Data is sampled on the first rising edge of SCK after CS goes low. If the clock line is shared with other peripheral devices on the SPI bus, the user can assert the HOLD input and place the 25XX640 in `HOLD' mode. After releasing the HOLD pin, operation will resume from the point when the HOLD was asserted.
Prior to any attempt to write data to the 25XX640 array or STATUS register, the write enable latch must be set by issuing the WREN instruction (Figure 3-4). This is done by setting CS low and then clocking out the proper instruction into the 25XX640. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch. If the write operation is initiated immediately after the WREN instruction without CS being brought high, the data will not be written to the array because the write enable latch will not have been properly set. Once the write enable latch is set, the user may proceed by setting the CS low, issuing a WRITE instruction, followed by the address, and then the data to be written. Up to 32 bytes of data can be sent to the 25XX640 before a write cycle is necessary. The only restriction is that all of the bytes must reside in the same page. A page address begins with XXX0 0000 and ends with XXX1 1111. If the internal address counter reaches XXX1 1111 and the clock continues, the counter will roll back to the first address of the page and overwrite any data in the page that may have been written. For the data to be actually written to the array, the CS must be brought high after the Least Significant bit (D0) of the nth data byte has been clocked in. If CS is brought high at any other time, the write operation will not be completed. Refer to Figure 3-2 and Figure 3-3 for more detailed illustrations on the byte write sequence and the page write sequence, respectively. While the write is in progress, the STATUS register may be read to check the status of the WPEN, WIP, WEL, BP1, and BP0 bits (Figure 3-6). A read attempt of a memory array location will not be possible during a write cycle. When the write cycle is completed, the write enable latch is reset.
3.2
Read Sequence
The device is selected by pulling CS low. The 8-bit READ instruction is transmitted to the 25XX640 followed by the 16-bit address with the three MSBs of the address being "don't care" bits. After the correct READ instruction and address are sent, the data stored in the memory at the selected address is shifted out on the SO pin. The data stored in the memory at the next address can be read sequentially by continuing to provide clock pulses. The internal Address Pointer is automatically incremented to the next higher address after each byte of data is shifted out. When the highest address is reached (1FFFh), the address counter rolls over to address 0000h allowing the read cycle to be continued indefinitely. The read operation is terminated by raising the CS pin (Figure 3-1).
TABLE 3-1:
INSTRUCTION SET
Instruction Format 0000 0011 0000 0010 0000 0110 0000 0100 0000 0101 0000 0001 Description Read data from memory array beginning at selected address Write data to memory array beginning at selected address Set the write enable latch (enable write operations) Reset the write enable latch (disable write operations) Read STATUS register Write STATUS register
Instruction Name READ WRITE WREN WRDI RDSR WRSR
(c) 2008 Microchip Technology Inc.
DS21223H-page 7
25AA640/25LC640
FIGURE 3-1:
CS 0 SCK Instruction SI 0 0 0 0 0 0 1 16-bit Address 1 15 14 13 12 2 1 0 Data Out 7 6 5 4 3 2 1 0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31
READ SEQUENCE
High-Impedance SO
FIGURE 3-2:
CS
BYTE WRITE SEQUENCE
Twc
Instruction SI 0 0 0 0 0 0 1
16-bit Address 0 15 14 13 12 2 1 0 7 6
Data Byte 5 4 3 2 1 0
High-Impedance SO
FIGURE 3-3:
CS 0 SCK 1 2
PAGE WRITE SEQUENCE
3
4
5
6
7
8
9 10 11 16-bit Address
21 22 23 24 25 26 27 28 29 30 31 Data Byte 1 2 1 0 7 6 5 4 3 2 1 0
Instruction SI 0 0 0 0 0 0 1
0 15 14 13 12
CS 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 SCK Data Byte 2 SI 7 6 5 4 3 2 1 0 7 6 Data Byte 3 5 4 3 2 1 0 7 Data Byte n (32 max) 6 5 4 3 2 1 0
DS21223H-page 8
(c) 2008 Microchip Technology Inc.
25AA640/25LC640
3.4 Write Enable (WREN) and Write Disable (WRDI)
The following is a list of conditions under which the write enable latch will be reset: * * * * Power-up WRDI instruction successfully executed WRSR instruction successfully executed WRITE instruction successfully executed
The 25XX640 contains a write enable latch. See Table 3-3 for the Write-Protect Functionality Matrix. This latch must be set before any write operation will be completed internally. The WREN instruction will set the latch, and the WRDI will reset the latch.
FIGURE 3-4:
WRITE ENABLE SEQUENCE
CS 0 SCK 1 2 3 4 5 6 7
SI
0
0
0
0
0
1
1
0
High-Impedance SO
FIGURE 3-5:
WRITE DISABLE SEQUENCE
CS 0 SCK 1 2 3 4 5 6 7
SI
0
0
0
0
0
1
0 1
0
High-Impedance SO
(c) 2008 Microchip Technology Inc.
DS21223H-page 9
25AA640/25LC640
3.5 Read Status Register Instruction (RDSR)
The Write Enable Latch (WEL) bit indicates the status of the write enable latch. When set to a `1', the latch allows writes to the array and STATUS register, when set to a `0', the latch prohibits writes to the array and STATUS register. The state of this bit can always be updated via the WREN or WRDI commands regardless of the state of write protection on the STATUS register. This bit is read-only. The Block Protection (BP0 and BP1) bits indicate which blocks are currently write-protected. These bits are set by the user issuing the WRSR instruction. These bits are nonvolatile. See Figure 3-6 for RDSR timing sequence.
The Read Status Register instruction (RDSR) provides access to the STATUS register. The STATUS register may be read at any time, even during a write cycle. The STATUS register is formatted as follows: 7 WPEN 6 X 5 X 4 X 3 BP1 2 BP0 1 WEL 0 WIP
The Write-In-Process (WIP) bit indicates whether the 25XX640 is busy with a write operation. When set to a `1', a write is in progress, when set to a `0', no write is in progress. This bit is read-only.
FIGURE 3-6:
CS
READ STATUS REGISTER TIMING SEQUENCE
0 SCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Instruction SI 0 0 0 0 0 1 0 1
High-Impedance SO 7 6
Data from STATUS Register 5 4 3 2 1 0
DS21223H-page 10
(c) 2008 Microchip Technology Inc.
25AA640/25LC640
3.6 Write Status Register Instruction (WRSR)
TABLE 3-2:
BP1 0 0 1 1
ARRAY PROTECTION
BP0 0 1 0 1 Array Addresses Write-Protected none upper 1/4 (1800h-1FFFh) upper 1/2 (1000h-1FFFh) all (0000h-1FFFh)
The Write Status Register instruction (WRSR) allows the user to select one of four levels of protection for the array by writing to the appropriate bits in the STATUS register. The array is divided up into four segments. The user has the ability to write-protect none, one, two, or all four of the segments of the array. The partitioning is controlled as shown in Table 3-2. The Write-Protect Enable (WPEN) bit is a nonvolatile bit that is available as an enable bit for the WP pin. The Write-Protect (WP) pin and the Write-Protect Enable (WPEN) bit in the STATUS register control the programmable hardware write-protect feature. Hardware write protection is enabled when the WP pin is low and the WPEN bit is high. Hardware write protection is disabled when either the WP pin is high or the WPEN bit is low. When the chip is hardware write-protected, only writes to nonvolatile bits in the STATUS register are disabled. See Table 3-3 for a matrix of functionality on the WPEN bit. See Figure 3-7 for WRSR timing sequence.
FIGURE 3-7:
WRITE STATUS REGISTER TIMING SEQUENCE
CS
0 SCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Instruction SI 0 0 0 0 0 0 0 1 7 6
Data to STATUS Register 5 4 3 2 1 0
High-Impedance SO
(c) 2008 Microchip Technology Inc.
DS21223H-page 11
25AA640/25LC640
3.7 Data Protection 3.8 Power-On-State
The following protection has been implemented to prevent inadvertent writes to the array: * The write enable latch is reset on power-up * A write enable instruction must be issued to set the write enable latch * After a byte write, page write, or STATUS register write, the write enable latch is reset * CS must be set high after the proper number of clock cycles to start an internal write cycle * Access to the array during an internal write cycle is ignored and programming is continued The 25XX640 powers on in the following state: * The device is in low-power Standby mode (CS = 1) * The write enable latch is reset * SO is in high-impedance state * A high-to-low transition on CS is required to enter the active state
.
TABLE 3-3:
WPEN X 0 1 X
WRITE-PROTECT FUNCTIONALITY MATRIX
WP X X Low High WEL 0 1 1 1 Protected Blocks Protected Protected Protected Protected Unprotected Blocks Protected Writable Writable Writable STATUS Register Protected Writable Protected Writable
DS21223H-page 12
(c) 2008 Microchip Technology Inc.
25AA640/25LC640
4.0
4.1
PACKAGING INFORMATION
Package Marking Information
8-Lead PDIP (300 mil)
XXXXXXXX XXXXXNNN YYWW
Example:
25LC640 /P017 0410
8-Lead SOIC (150 mil)
XXXXXXXX XXXXYYWW NNN
Example:
25LC640 I/SN0410 017
8-Lead TSSOP
XXXX YYWW NNN
Example:
5LCX
0410
017
Legend: XX...X Y YY WW NNN
e3
*
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
Note:
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
*
Standard marking consists of Microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please check with your Microchip Sales Office.
(c) 2008 Microchip Technology Inc.
DS21223H-page 13
25AA640/25LC640
/HDG 3ODVWLF 'XDO ,Q /LQH 3
1RWH
PLO %RG\ >3',3@
)RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ
N
NOTE 1 E1
1
2 D
3 E A2
A
A1 e b1 b
L
c
eB
8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 3LWFK 7RS WR 6HDWLQJ 3ODQH 0ROGHG 3DFNDJH 7KLFNQHVV %DVH WR 6HDWLQJ 3ODQH 6KRXOGHU WR 6KRXOGHU :LGWK 0ROGHG 3DFNDJH :LGWK 2YHUDOO /HQJWK 7LS WR 6HDWLQJ 3ODQH /HDG 7KLFNQHVV 8SSHU /HDG :LGWK /RZHU /HDG :LGWK 2YHUDOO 5RZ 6SDFLQJ 1 H $ $ $ ( ( ' / F E E H% 0,1
,1&+(6 120 %6& 0$;
1RWHV 3LQ YLVXDO LQGH[ IHDWXUH PD\ YDU\ EXW PXVW EH ORFDWHG ZLWK WKH KDWFKHG DUHD 6LJQLILFDQW &KDUDFWHULVWLF 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( < 0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV
SHU VLGH
0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &
%
DS21223H-page 14
(c) 2008 Microchip Technology Inc.
25AA640/25LC640
/HDG 3ODVWLF 6PDOO 2XWOLQH 61 1DUURZ
1RWH
PP %RG\ >62,&@
)RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ
D e N
E E1
NOTE 1 1 2 3 b h c h
A
A2
A1
L L1
8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 3LWFK 2YHUDOO +HLJKW 0ROGHG 3DFNDJH 7KLFNQHVV 6WDQGRII 2YHUDOO :LGWK 0ROGHG 3DFNDJH :LGWK 2YHUDOO /HQJWK &KDPIHU RSWLRQDO )RRW /HQJWK )RRWSULQW )RRW $QJOH /HDG 7KLFNQHVV /HDG :LGWK 0ROG 'UDIW $QJOH 7RS 0ROG 'UDIW $QJOH %RWWRP 1 H $ $ $ ( ( ' K / / I F E D E 0,1
0,//,0(7(56 120 %6& %6& %6& %6& 5() 0$;
1RWHV 3LQ YLVXDO LQGH[ IHDWXUH PD\ YDU\ EXW PXVW EH ORFDWHG ZLWKLQ WKH KDWFKHG DUHD 6LJQLILFDQW &KDUDFWHULVWLF 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( < 0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 5() 5HIHUHQFH 'LPHQVLRQ XVXDOO\ ZLWKRXW WROHUDQFH IRU LQIRUPDWLRQ SXUSRVHV RQO\
PP SHU VLGH
0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &
%
(c) 2008 Microchip Technology Inc.
DS21223H-page 15
25AA640/25LC640
/HDG 3ODVWLF 6PDOO 2XWOLQH 61 1DUURZ
1RWH
PP %RG\ >62,&@
)RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ
DS21223H-page 16
(c) 2008 Microchip Technology Inc.
25AA640/25LC640
/HDG 3ODVWLF 7KLQ 6KULQN 6PDOO 2XWOLQH 67
1RWH
PP %RG\ >76623@
)RU WKH PRVW FXUUHQW SDFNDJH GUDZLQJV SOHDVH VHH WKH 0LFURFKLS 3DFNDJLQJ 6SHFLILFDWLRQ ORFDWHG DW KWWS ZZZ PLFURFKLS FRP SDFNDJLQJ
D N
E E1
NOTE 1
1 b
2 e c
A
A2
A1
L1
L
8QLWV 'LPHQVLRQ /LPLWV 1XPEHU RI 3LQV 3LWFK 2YHUDOO +HLJKW 0ROGHG 3DFNDJH 7KLFNQHVV 6WDQGRII 2YHUDOO :LGWK 0ROGHG 3DFNDJH :LGWK 0ROGHG 3DFNDJH /HQJWK )RRW /HQJWK )RRWSULQW )RRW $QJOH /HDG 7KLFNQHVV 1 H $ $ $ ( ( ' / / I F 0,1
0,//,0(7(56 120 %6& %6& 0$;
5()
/HDG :LGWK E 1RWHV 3LQ YLVXDO LQGH[ IHDWXUH PD\ YDU\ EXW PXVW EH ORFDWHG ZLWKLQ WKH KDWFKHG DUHD 'LPHQVLRQV ' DQG ( GR QRW LQFOXGH PROG IODVK RU SURWUXVLRQV 0ROG IODVK RU SURWUXVLRQV VKDOO QRW H[FHHG 'LPHQVLRQLQJ DQG WROHUDQFLQJ SHU $60( < 0 %6& %DVLF 'LPHQVLRQ 7KHRUHWLFDOO\ H[DFW YDOXH VKRZQ ZLWKRXW WROHUDQFHV 5() 5HIHUHQFH 'LPHQVLRQ XVXDOO\ ZLWKRXW WROHUDQFH IRU LQIRUPDWLRQ SXUSRVHV RQO\
PP SHU VLGH
0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &
%
(c) 2008 Microchip Technology Inc.
DS21223H-page 17
25AA640/25LC640
APPENDIX A:
Revision F
Corrections to Section 1.0, Electrical Characteristics.
REVISION HISTORY
Revision G
Product ID System, Example C: Corrected part number, added "Alternate Pinout" and corrected part number in Header. Updated Trademark and Sales List pages.
Revision H (June 2008)
Added "Not Recommended" note; Updated Packaging; General updates.
DS21223H-page 18
(c) 2008 Microchip Technology Inc.
25AA640/25LC640
THE MICROCHIP WEB SITE
Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: * Product Support - Data sheets and errata, application notes and sample programs, design resources, user's guides and hardware support documents, latest software releases and archived software * General Technical Support - Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing * Business of Microchip - Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives
CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels: * * * * * Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Development Systems Information Line
Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com
CUSTOMER CHANGE NOTIFICATION SERVICE
Microchip's customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions.
(c) 2008 Microchip Technology Inc.
DS21223H-page 19
25AA640/25LC640
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: RE: Technical Publications Manager Reader Response Total Pages Sent ________
From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y N Literature Number: DS21223H FAX: (______) _________ - _________
Device: 25AA640/25LC640 Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21223H-page 20
(c) 2008 Microchip Technology Inc.
25AA640/25LC640
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range
25AA640: 25AA640T:
/XX Package
XXX Pattern
Examples: a) b) 25AA640-I/SN: Industrial Temp., SOIC package 25AA640T-I/SN: Tape and Reel, Industrial Temp., SOIC package 25AA640X-I/ST: Alternate Pinout Industrial Temp., TSSOP package 25LC640-I/SN: Industrial Temp., SOIC package 25LC640T-I/SN: Tape and Reel, Industrial Temp., SOIC package 25LC640X-I/ST: Alternate Pinout, Industrial Temp., TSSOP package
Device
64K bit 1.8V SPI Serial EEPROM 64K bit 1.8V SPI Serial EEPROM (Tape and Reel) 25AA640X: 64K bit 1.8V SPI Serial EEPROM in alternate pinout (ST only) 25AA640XT: 64K bit 1.8V SPI Serial EEPROM in alternate pinout Tape and Reel (ST only) 25LC640: 64K bit 2.5V SPI Serial EEPROM 25LC640T: 64K bit 2.5V SPI Serial EEPROM (Tape and Reel) 25LC640X: 64K bit 2.5V SPI Serial EEPROM in alternate pinout (ST only) 25LC640XT: 64K bit 2.5V SPI Serial EEPROM in alternate pinout Tape and Reel (ST only)
c) d) e) f)
Temperature Range
I E
= =
-40C to +85C -40C to +125C
Package
P SN ST
= = =
Plastic DIP (300 mil Body), 8-lead Plastic SOIC (150 mil Body), 8-lead Plastic TSSOP (4.4 mm Body), 8-lead
(c) 2008 Microchip Technology Inc.
DS21223H-page 21
25AA640/25LC640
NOTES:
DS21223H-page 22
(c) 2008 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, rfPIC and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM, PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2008, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
(c) 2008 Microchip Technology Inc.
DS21223H-page 23
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049
ASIA/PACIFIC
India - Bangalore Tel: 91-80-4182-8400 Fax: 91-80-4182-8422 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350
EUROPE
Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820
01/02/08
DS21223H-page 24
(c) 2008 Microchip Technology Inc.

▲Up To Search▲

Price & Availability of 25LC640XT-IP

	To Download 25LC640XT-IP Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .